Reference clocks for controlling precision equipment, such as the spindle speed of a rotating disk within a disk drive, require adjusting a clock reference with a maximum amount of resolution, while maintaining a high degree of symmetry between on and off portions of the clocking signal (hereinafter referred to as "symmetrical duty cycle").
A typical implementation of the prior art employs a standard counter and a toggle flip-flop which divides the output of the counter by two, in order to obtain a symmetrical output. The problem with this classical approach is that fine adjustment resolution is lost: i.e., the clock output period is adjustable in increments equal to twice the reference clock period, rather than in increments of the clock period, thereby necessitating a clock at a very high frequency and concomitantly greater complexity and expense associated with the operative circuitry.